3 bit counter truth table

Counter is a sequential circuit. A digital circuit which is used for a counting pulses is known counter. Counter is the widest application of flip-flops. It is a group of flip-flops with a clock signal applied.

Synchronous 3-Bit JK Flip-Flop Counter

Counters are of two types. The logic diagram of a 2-bit ripple up counter is shown in figure. The toggle T flip-flop are being used. But we can use the JK flip-flop also with J and K connected permanently to logic 1.

External clock is applied to the clock input of flip-flop A and Q A output is applied to the clock input of the next flip-flop i.

As soon as the first negative clock edge is applied, FF-A will toggle and Q A will be equal to 1. Q A is connected to clock input of FF-B. Since Q A has changed from 0 to 1, it is treated as the positive clock edge by FF-B.

There is no change in Q B because FF-B is a negative edge triggered FF. The change in Q A acts as a negative clock edge for FF-B. So it will also toggle, and Q B will be 1. On the arrival of 3rd negative clock edge, FF-A toggles again and Q A become 1 from 0. Since this is a positive going change, FF-B does not respond to it and remains inactive.

So Q B does not change and continues to be equal to 1. On the arrival of 4th negative clock edge, FF-A toggles again and Q A becomes 1 from 0. This negative change in Q A acts as clock pulse for FF-B. Hence it toggles to change Q B from 1 to 0. If the "clock" pulses are applied to all the flip-flops in a counter simultaneously, then such a counter is called as synchronous counter.

The J A and K A inputs of FF-A are tied to logic 1.

So FF-A will work as a toggle flip-flop. The J B and K B inputs are connected to Q A. As soon as the first negative clock edge is applied, FF-A will toggle and Q A will change from 0 to 1.

Hence FF-B will not change its state.

So Q B will remain 0. On the arrival of second negative clock edge, FF-A toggles again and Q A changes from 1 to 0. But at this instant Q A was 1.

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Hence Q B changes from 0 to 1. On application of the third falling clock edge, FF-A will toggle from 0 to 1 but there is no change of state for FF-B.

On application of the next clock pulse, Q A will change from 1 to 0 as Q B will also change from 1 to 0. A mode control M input is also provided to select either up or down mode. So either T flip-flops or JK flip-flops are to be used. The LSB flip-flop receives clock directly. This will operate the counter in the counting mode. For a ripple up counter, the Q output of preceding FF is connected to the clock input of the next one. For a ripple down counter, the Q bar output of preceding FF is connected to the clock input of the next one.

So connect Q to CLK. So connect Q bar to CLK. Hence Q A gets connected to the clock input of FF-B and Q B gets connected to the clock input of FF-C. These connections are same as those for the normal up counter.

Hence Q A bar gets connected to the clock input of FF-B and Q B bar gets connected to the clock input of FF-C.

These connections will produce a down counter.

The 2-bit ripple counter is called as MOD-4 counter and 3-bit ripple counter is called as MOD-8 counter. So in general, an n-bit ripple counter is called as modulo-N counter.

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